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79 lines
2.4 KiB
C++
79 lines
2.4 KiB
C++
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#include "configuration.h"
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#include <core_cm4.h>
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// Based on reading/modifying https://blog.feabhas.com/2013/02/developing-a-generic-hard-fault-handler-for-arm-cortex-m3cortex-m4/
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enum { r0, r1, r2, r3, r12, lr, pc, psr };
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// Per http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0552a/Cihcfefj.html
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static void printUsageErrorMsg(uint32_t cfsr)
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{
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DEBUG_MSG("Usage fault: ");
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cfsr >>= SCB_CFSR_USGFAULTSR_Pos; // right shift to lsb
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if ((cfsr & (1 << 9)) != 0)
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DEBUG_MSG("Divide by zero\n");
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if ((cfsr & (1 << 8)) != 0)
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DEBUG_MSG("Unaligned\n");
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}
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static void printBusErrorMsg(uint32_t cfsr)
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{
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DEBUG_MSG("Usage fault: ");
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cfsr >>= SCB_CFSR_BUSFAULTSR_Pos; // right shift to lsb
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if ((cfsr & (1 << 0)) != 0)
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DEBUG_MSG("Instruction bus error\n");
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if ((cfsr & (1 << 1)) != 0)
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DEBUG_MSG("Precise data bus error\n");
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if ((cfsr & (1 << 2)) != 0)
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DEBUG_MSG("Imprecise data bus error\n");
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}
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static void printMemErrorMsg(uint32_t cfsr)
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{
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DEBUG_MSG("Usage fault: ");
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cfsr >>= SCB_CFSR_MEMFAULTSR_Pos; // right shift to lsb
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if ((cfsr & (1 << 0)) != 0)
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DEBUG_MSG("Instruction access violation\n");
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if ((cfsr & (1 << 1)) != 0)
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DEBUG_MSG("Data access violation\n");
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}
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static void HardFault_Impl(uint32_t stack[])
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{
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DEBUG_MSG("In Hard Fault Handler\n");
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DEBUG_MSG("SCB->HFSR = 0x%08lx\n", SCB->HFSR);
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if ((SCB->HFSR & SCB_HFSR_FORCED_Msk) != 0) {
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DEBUG_MSG("Forced Hard Fault\n");
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DEBUG_MSG("SCB->CFSR = 0x%08lx\n", SCB->CFSR);
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if ((SCB->CFSR & SCB_CFSR_USGFAULTSR_Msk) != 0) {
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printUsageErrorMsg(SCB->CFSR);
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}
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if ((SCB->CFSR & SCB_CFSR_BUSFAULTSR_Msk) != 0) {
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printBusErrorMsg(SCB->CFSR);
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}
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if ((SCB->CFSR & SCB_CFSR_MEMFAULTSR_Msk) != 0) {
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printMemErrorMsg(SCB->CFSR);
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}
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DEBUG_MSG("r0 = 0x%08lx\n", stack[r0]);
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DEBUG_MSG("r1 = 0x%08lx\n", stack[r1]);
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DEBUG_MSG("r2 = 0x%08lx\n", stack[r2]);
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DEBUG_MSG("r3 = 0x%08lx\n", stack[r3]);
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DEBUG_MSG("r12 = 0x%08lx\n", stack[r12]);
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DEBUG_MSG("lr = 0x%08lx\n", stack[lr]);
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DEBUG_MSG("pc = 0x%08lx\n", stack[pc]);
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DEBUG_MSG("psr = 0x%08lx\n", stack[psr]);
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asm volatile("bkpt #01");
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while (1)
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;
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}
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}
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void HardFault_Handler(void)
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{
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asm volatile(" mrs r0,msp\n"
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" b HardFault_Impl \n");
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}
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