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lorarelay wip

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This commit is contained in:
geeksville 2020-08-16 14:07:01 -07:00
parent 0cfeeba2e2
commit 08e5bd728b
2 changed files with 141 additions and 144 deletions
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66
variants/lora-relay-v1/variant.cpp
View File

@ -19,12 +19,11 @@
*/ */
#include "variant.h" #include "variant.h"
#include "nrf.h"
#include "wiring_constants.h" #include "wiring_constants.h"
#include "wiring_digital.h" #include "wiring_digital.h"
#include "nrf.h"
const uint32_t g_ADigitalPinMap[] = const uint32_t g_ADigitalPinMap[] = {
{
// D0 .. D13 // D0 .. D13
25, // D0 is P0.25 (UART TX) 25, // D0 is P0.25 (UART TX)
24, // D1 is P0.24 (UART RX 24, // D1 is P0.24 (UART RX
@ -37,9 +36,9 @@ const uint32_t g_ADigitalPinMap[] =
16, // D8 is P0.16 (NeoPixel) 16, // D8 is P0.16 (NeoPixel)
26, // D9 is P0.26 26, // D9 is P0.26
27, // D10 is P0.27 27, // D10 is P0.27
6, // D11 is P0.06 6, // D11 is P0.06 D_RES (IPS display reset)
8, // D12 is P0.08 8, // D12 is P0.08 D_CS (IPS display chip select)
41, // D13 is P1.09 41, // D13 is P1.09 BLT (IPS display backlight)
// D14 .. D21 (aka A0 .. A7) // D14 .. D21 (aka A0 .. A7)
4, // D14 is P0.04 (A0) 4, // D14 is P0.04 (A0)
@ -61,38 +60,38 @@ const uint32_t g_ADigitalPinMap[] =
14, // D26 is P0.14 (SPI SCK ) 14, // D26 is P0.14 (SPI SCK )
// QSPI pins (not exposed via any header / test point) // QSPI pins (not exposed via any header / test point)
19, // D27 is P0.19 (QSPI CLK) // 19, // P0.19 (QSPI CLK)
20, // D28 is P0.20 (QSPI CS) // 20, // P0.20 (QSPI CS)
17, // D29 is P0.17 (QSPI Data 0) // 17, // P0.17 (QSPI Data 0)
22, // D30 is P0.22 (QSPI Data 1) // 22, // P0.22 (QSPI Data 1)
23, // D31 is P0.23 (QSPI Data 2) // 23, // P0.23 (QSPI Data 2)
21, // D32 is P0.21 (QSPI Data 3) // 21, // P0.21 (QSPI Data 3)
// The remaining NFC pin // The remaining NFC pin
9, // D33 is P0.09 (NFC1, exposed only via test point on bottom of board) 9, // D27 P0.09 (NFC1, exposed only via test point on bottom of board)
// Thus, there are 34 defined pins
// The remaining pins are not usable:
//
//
// The following pins were never listed as they were considered unusable // The following pins were never listed as they were considered unusable
0, // P0.00 is XL1 (attached to 32.768kHz crystal) // 0, // P0.00 is XL1 (attached to 32.768kHz crystal) Never expose as GPIOs
1, // P0.01 is XL2 (attached to 32.768kHz crystal) // 1, // P0.01 is XL2 (attached to 32.768kHz crystal)
18, // P0.18 is RESET (attached to switch) 18, // D28 P0.18 is RESET (attached to switch)
32, // P1.00 is SWO (attached to debug header) // 32, // P1.00 is SWO (attached to debug header)
// The remaining pins are not connected (per schematic) // D29-D43
33, //D38 is P1.01 is not connected per schematic 27, // P0.27 E22-SX1262 DIO1
35, //D39 is P1.03 is not connected per schematic 28, // P0.28 E22-SX1262 DIO2
36, //D40 P1.04 is not connected per schematic 30, // P0.30 E22-SX1262 TXEN
37, //D41 P1.05 is not connected per schematic 32 + 1, // P1.01 BTN_UP
38, //D42 P1.06 is not connected per schematic 32 + 2, // P1.02 SWITCH
39, //D43 P1.07 is not connected per schematic 35, // P1.03 E22-SX1262 NSS
43, //D44 P1.11 is not connected per schematic 36, // P1.04 is not connected per schematic
44, //D45 is P1.12 is not connected per schematic 37, // P1.05 is not connected per schematic
45, //D46 P1.13 is not connected per schematic 38, // P1.06 is not connected per schematic
46, //D47 is P1.14 is not connected per schematic 39, // P1.07 is not connected per schematic
32 + 8, // P1.08 E22-SX1262 BUSY
43, // P1.11 is not connected per schematic
32 + 12, // P1.12 E22-SX1262 RESET
45, // P1.13 is not connected per schematic
46, // P1.14 is not connected per schematic
}; };
void initVariant() void initVariant()
@ -104,4 +103,3 @@ void initVariant()
pinMode(PIN_LED2, OUTPUT); pinMode(PIN_LED2, OUTPUT);
ledOff(PIN_LED2); ledOff(PIN_LED2);
} }

29
variants/lora-relay-v1/variant.h
View File

@ -16,8 +16,8 @@
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#ifndef _VARIANT_FEATHER52840_ #ifndef _VARIANT_LORA_RELAY_V1_
#define _VARIANT_FEATHER52840_ #define _VARIANT_LORA_RELAY_V1_
/** Master clock frequency */ /** Master clock frequency */
#define VARIANT_MCK (64000000ul) #define VARIANT_MCK (64000000ul)
@ -32,14 +32,13 @@
#include "WVariant.h" #include "WVariant.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" extern "C" {
{
#endif // __cplusplus #endif // __cplusplus
// Number of pins defined in PinDescription array // Number of pins defined in PinDescription array
#define PINS_COUNT (48) #define PINS_COUNT (43)
#define NUM_DIGITAL_PINS (48) #define NUM_DIGITAL_PINS (43)
#define NUM_ANALOG_INPUTS (6) // A6 is used for battery, A7 is analog reference #define NUM_ANALOG_INPUTS (8) // A6 is used for battery, A7 is analog reference
#define NUM_ANALOG_OUTPUTS (0) #define NUM_ANALOG_OUTPUTS (0)
// LEDs // LEDs
@ -119,16 +118,16 @@ static const uint8_t SCK = PIN_SPI_SCK ;
#define PIN_WIRE_SCL (23) #define PIN_WIRE_SCL (23)
// QSPI Pins // QSPI Pins
#define PIN_QSPI_SCK 27 //#define PIN_QSPI_SCK 27
#define PIN_QSPI_CS 28 //#define PIN_QSPI_CS 28
#define PIN_QSPI_IO0 29 //#define PIN_QSPI_IO0 29
#define PIN_QSPI_IO1 30 //#define PIN_QSPI_IO1 30
#define PIN_QSPI_IO2 31 //#define PIN_QSPI_IO2 31
#define PIN_QSPI_IO3 32 //#define PIN_QSPI_IO3 32
// On-board QSPI Flash // On-board QSPI Flash
#define EXTERNAL_FLASH_DEVICES GD25Q16C //#define EXTERNAL_FLASH_DEVICES GD25Q16C
#define EXTERNAL_FLASH_USE_QSPI //#define EXTERNAL_FLASH_USE_QSPI
#ifdef __cplusplus #ifdef __cplusplus
} }