diff --git a/src/platform/esp32/architecture.h b/src/platform/esp32/architecture.h index 522e862ac..80749ee6b 100644 --- a/src/platform/esp32/architecture.h +++ b/src/platform/esp32/architecture.h @@ -45,6 +45,9 @@ #ifndef HAS_CUSTOM_CRYPTO_ENGINE #define HAS_CUSTOM_CRYPTO_ENGINE 1 #endif +#ifndef HAS_32768HZ +#define HAS_32768HZ 0 +#endif #if defined(HAS_AXP192) || defined(HAS_AXP2101) #define HAS_PMU @@ -215,3 +218,13 @@ #endif #define SERIAL0_RX_GPIO 3 // Always GPIO3 on ESP32 // FIXME: may be different on ESP32-S3, etc. + +// Setup flag, which indicates if our device supports power management +#ifdef CONFIG_PM_ENABLE +#define HAS_ESP32_PM_SUPPORT 1 +#endif + +// Setup flag, which indicates if our device supports dynamic light sleep +#if defined(HAS_ESP32_PM_SUPPORT) && defined(CONFIG_FREERTOS_USE_TICKLESS_IDLE) +#define HAS_ESP32_DYNAMIC_LIGHT_SLEEP 1 +#endif \ No newline at end of file diff --git a/src/platform/esp32/main-esp32.cpp b/src/platform/esp32/main-esp32.cpp index cdea53c9a..760964119 100644 --- a/src/platform/esp32/main-esp32.cpp +++ b/src/platform/esp32/main-esp32.cpp @@ -64,7 +64,7 @@ void getMacAddr(uint8_t *dmac) #endif } -#ifdef HAS_32768HZ +#if HAS_32768HZ #define CALIBRATE_ONE(cali_clk) calibrate_one(cali_clk, #cali_clk) static uint32_t calibrate_one(rtc_cal_sel_t cal_clk, const char *name) @@ -86,17 +86,17 @@ void enableSlowCLK() uint32_t cal_32k = CALIBRATE_ONE(RTC_CAL_32K_XTAL); if (cal_32k == 0) { - LOG_DEBUG("32K XTAL OSC has not started up"); + LOG_DEBUG("32k XTAL OSC has not started up"); } else { rtc_clk_slow_freq_set(RTC_SLOW_FREQ_32K_XTAL); - LOG_DEBUG("Switch RTC Source to 32.768Khz succeeded, using 32K XTAL"); + LOG_DEBUG("Switch RTC Source to 32.768kHz succeeded, using 32k XTAL"); CALIBRATE_ONE(RTC_CAL_RTC_MUX); CALIBRATE_ONE(RTC_CAL_32K_XTAL); } CALIBRATE_ONE(RTC_CAL_RTC_MUX); CALIBRATE_ONE(RTC_CAL_32K_XTAL); if (rtc_clk_slow_freq_get() != RTC_SLOW_FREQ_32K_XTAL) { - LOG_WARN("Failed to switch 32K XTAL RTC source to 32.768Khz !!! "); + LOG_WARN("Failed to switch 32K XTAL RTC source to 32.768kHz !!! "); return; } } @@ -182,7 +182,7 @@ void esp32Setup() res = esp_task_wdt_add(NULL); assert(res == ESP_OK); -#ifdef HAS_32768HZ +#if HAS_32768HZ enableSlowCLK(); #endif } diff --git a/variants/esp32s3/heltec_v3/variant.h b/variants/esp32s3/heltec_v3/variant.h index 4f1d91db8..d760c3b7f 100644 --- a/variants/esp32s3/heltec_v3/variant.h +++ b/variants/esp32s3/heltec_v3/variant.h @@ -40,3 +40,5 @@ #define SX126X_DIO2_AS_RF_SWITCH #define SX126X_DIO3_TCXO_VOLTAGE 1.8 + +#define HAS_32768HZ 1 \ No newline at end of file diff --git a/variants/esp32s3/tbeam-s3-core/variant.h b/variants/esp32s3/tbeam-s3-core/variant.h index dabd52980..40ba0307a 100644 --- a/variants/esp32s3/tbeam-s3-core/variant.h +++ b/variants/esp32s3/tbeam-s3-core/variant.h @@ -62,6 +62,6 @@ // #define PCF8563_RTC 0x51 //Putting definitions in variant. h does not compile correctly // has 32768 Hz crystal -#define HAS_32768HZ +#define HAS_32768HZ 1 -#define USE_SH1106 \ No newline at end of file +#define USE_SH1106