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(2/3) Add Slow Clock Support for RP2040 platform. This will disable USB Softserial.
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@ -1,8 +1,8 @@
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; Common settings for rp2040 Processor based targets
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[rp2040_base]
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platform = https://github.com/maxgerhardt/platform-raspberrypi.git#612de5399d68b359053f1307ed223d400aea975c
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platform = https://github.com/maxgerhardt/platform-raspberrypi.git#60d6ae81fcc73c34b1493ca9e261695e471bc0c2
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extends = arduino_base
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platform_packages = framework-arduinopico@https://github.com/earlephilhower/arduino-pico.git#3.6.2
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platform_packages = framework-arduinopico@https://github.com/earlephilhower/arduino-pico.git#3.7.2
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board_build.core = earlephilhower
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board_build.filesystem_size = 0.5m
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@ -3,7 +3,11 @@
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#include "PowerFSM.h"
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#include "configuration.h"
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#ifdef RP2040_SLOW_CLOCK
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#define Port Serial2
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#else
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#define Port Serial
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#endif
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// Defaulting to the formerly removed phone_timeout_secs value of 15 minutes
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#define SERIAL_CONNECTION_TIMEOUT (15 * 60) * 1000UL
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@ -31,6 +35,10 @@ SerialConsole::SerialConsole() : StreamAPI(&Port), RedirectablePrint(&Port), con
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canWrite = false; // We don't send packets to our port until it has talked to us first
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// setDestination(&noopPrint); for testing, try turning off 'all' debug output and see what leaks
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#ifdef RP2040_SLOW_CLOCK
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Port.setTX(SERIAL2_TX);
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Port.setRX(SERIAL2_RX);
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#endif
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Port.begin(SERIAL_BAUD);
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#if defined(ARCH_NRF52) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3) || defined(ARCH_RP2040)
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time_t timeout = millis();
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@ -126,8 +126,13 @@ int32_t SerialModule::runOnce()
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uint32_t baud = getBaudRate();
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if (moduleConfig.serial.override_console_serial_port) {
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#ifdef RP2040_SLOW_CLOCK
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Serial2.flush();
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serialPrint = &Serial2;
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#else
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Serial.flush();
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serialPrint = &Serial;
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#endif
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// Give it a chance to flush out 💩
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delay(10);
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}
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@ -151,8 +156,13 @@ int32_t SerialModule::runOnce()
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Serial2.begin(baud, SERIAL_8N1);
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Serial2.setTimeout(moduleConfig.serial.timeout > 0 ? moduleConfig.serial.timeout : TIMEOUT);
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} else {
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#ifdef RP2040_SLOW_CLOCK
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Serial2.begin(baud, SERIAL_8N1);
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Serial2.setTimeout(moduleConfig.serial.timeout > 0 ? moduleConfig.serial.timeout : TIMEOUT);
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#else
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Serial.begin(baud, SERIAL_8N1);
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Serial.setTimeout(moduleConfig.serial.timeout > 0 ? moduleConfig.serial.timeout : TIMEOUT);
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#endif
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}
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#else
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Serial.begin(baud, SERIAL_8N1);
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@ -1,4 +1,7 @@
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#include "configuration.h"
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#include <hardware/clocks.h>
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#include <hardware/pll.h>
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#include <pico/stdlib.h>
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#include <pico/unique_id.h>
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#include <stdio.h>
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@ -35,9 +38,56 @@ void rp2040Setup()
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Taken from CPU cycle counter and ROSC oscillator, so should be pretty random.
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*/
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randomSeed(rp2040.hwrand32());
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#ifdef RP2040_SLOW_CLOCK
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uint f_pll_sys = frequency_count_khz(CLOCKS_FC0_SRC_VALUE_PLL_SYS_CLKSRC_PRIMARY);
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uint f_pll_usb = frequency_count_khz(CLOCKS_FC0_SRC_VALUE_PLL_USB_CLKSRC_PRIMARY);
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uint f_rosc = frequency_count_khz(CLOCKS_FC0_SRC_VALUE_ROSC_CLKSRC);
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uint f_clk_sys = frequency_count_khz(CLOCKS_FC0_SRC_VALUE_CLK_SYS);
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uint f_clk_peri = frequency_count_khz(CLOCKS_FC0_SRC_VALUE_CLK_PERI);
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uint f_clk_usb = frequency_count_khz(CLOCKS_FC0_SRC_VALUE_CLK_USB);
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uint f_clk_adc = frequency_count_khz(CLOCKS_FC0_SRC_VALUE_CLK_ADC);
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uint f_clk_rtc = frequency_count_khz(CLOCKS_FC0_SRC_VALUE_CLK_RTC);
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LOG_INFO("Clock speed:\n");
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LOG_INFO("pll_sys = %dkHz\n", f_pll_sys);
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LOG_INFO("pll_usb = %dkHz\n", f_pll_usb);
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LOG_INFO("rosc = %dkHz\n", f_rosc);
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LOG_INFO("clk_sys = %dkHz\n", f_clk_sys);
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LOG_INFO("clk_peri = %dkHz\n", f_clk_peri);
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LOG_INFO("clk_usb = %dkHz\n", f_clk_usb);
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LOG_INFO("clk_adc = %dkHz\n", f_clk_adc);
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LOG_INFO("clk_rtc = %dkHz\n", f_clk_rtc);
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#endif
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}
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void enterDfuMode()
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{
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reset_usb_boot(0, 0);
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}
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/* Init in early boot state. */
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#ifdef RP2040_SLOW_CLOCK
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void initVariant()
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{
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/* Set the system frequency to 18 MHz. */
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set_sys_clock_khz(18 * KHZ, false);
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/* The previous line automatically detached clk_peri from clk_sys, and
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attached it to pll_usb. We need to attach clk_peri back to system PLL to keep SPI
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working at this low speed.
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For details see https://github.com/jgromes/RadioLib/discussions/938
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*/
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clock_configure(clk_peri,
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0, // No glitchless mux
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CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS, // System PLL on AUX mux
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18 * MHZ, // Input frequency
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18 * MHZ // Output (must be same as no divider)
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);
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/* Run also ADC on lower clk_sys. */
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clock_configure(clk_adc, 0, CLOCKS_CLK_ADC_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS, 18 * MHZ, 18 * MHZ);
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/* Run RTC from XOSC since USB clock is off */
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clock_configure(clk_rtc, 0, CLOCKS_CLK_RTC_CTRL_AUXSRC_VALUE_XOSC_CLKSRC, 12 * MHZ, 47 * KHZ);
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/* Turn off USB PLL */
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pll_deinit(pll_usb);
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}
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#endif
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