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standarize values of HAS_32768HZ capability flag

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This commit is contained in:
m1nl 2025-08-25 19:44:13 +02:00
parent 9a1c2c9b61
commit ba26d03b1b
3 changed files with 10 additions and 7 deletions
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3
src/platform/esp32/architecture.h
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@ -45,6 +45,9 @@
#ifndef HAS_CUSTOM_CRYPTO_ENGINE #ifndef HAS_CUSTOM_CRYPTO_ENGINE
#define HAS_CUSTOM_CRYPTO_ENGINE 1 #define HAS_CUSTOM_CRYPTO_ENGINE 1
#endif #endif
#ifndef HAS_32768HZ
#define HAS_32768HZ 0
#endif
#if defined(HAS_AXP192) || defined(HAS_AXP2101) #if defined(HAS_AXP192) || defined(HAS_AXP2101)
#define HAS_PMU #define HAS_PMU

10
src/platform/esp32/main-esp32.cpp
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@ -64,7 +64,7 @@ void getMacAddr(uint8_t *dmac)
#endif #endif
} }
#ifdef HAS_32768HZ #if HAS_32768HZ
#define CALIBRATE_ONE(cali_clk) calibrate_one(cali_clk, #cali_clk) #define CALIBRATE_ONE(cali_clk) calibrate_one(cali_clk, #cali_clk)
static uint32_t calibrate_one(rtc_cal_sel_t cal_clk, const char *name) static uint32_t calibrate_one(rtc_cal_sel_t cal_clk, const char *name)
@ -86,17 +86,17 @@ void enableSlowCLK()
uint32_t cal_32k = CALIBRATE_ONE(RTC_CAL_32K_XTAL); uint32_t cal_32k = CALIBRATE_ONE(RTC_CAL_32K_XTAL);
if (cal_32k == 0) { if (cal_32k == 0) {
LOG_DEBUG("32K XTAL OSC has not started up"); LOG_DEBUG("32k XTAL OSC has not started up");
} else { } else {
rtc_clk_slow_freq_set(RTC_SLOW_FREQ_32K_XTAL); rtc_clk_slow_freq_set(RTC_SLOW_FREQ_32K_XTAL);
LOG_DEBUG("Switch RTC Source to 32.768Khz succeeded, using 32K XTAL"); LOG_DEBUG("Switch RTC Source to 32.768kHz succeeded, using 32k XTAL");
CALIBRATE_ONE(RTC_CAL_RTC_MUX); CALIBRATE_ONE(RTC_CAL_RTC_MUX);
CALIBRATE_ONE(RTC_CAL_32K_XTAL); CALIBRATE_ONE(RTC_CAL_32K_XTAL);
} }
CALIBRATE_ONE(RTC_CAL_RTC_MUX); CALIBRATE_ONE(RTC_CAL_RTC_MUX);
CALIBRATE_ONE(RTC_CAL_32K_XTAL); CALIBRATE_ONE(RTC_CAL_32K_XTAL);
if (rtc_clk_slow_freq_get() != RTC_SLOW_FREQ_32K_XTAL) { if (rtc_clk_slow_freq_get() != RTC_SLOW_FREQ_32K_XTAL) {
LOG_WARN("Failed to switch 32K XTAL RTC source to 32.768Khz !!! "); LOG_WARN("Failed to switch 32K XTAL RTC source to 32.768kHz !!! ");
return; return;
} }
} }
@ -182,7 +182,7 @@ void esp32Setup()
res = esp_task_wdt_add(NULL); res = esp_task_wdt_add(NULL);
assert(res == ESP_OK); assert(res == ESP_OK);
#ifdef HAS_32768HZ #if HAS_32768HZ
enableSlowCLK(); enableSlowCLK();
#endif #endif
} }

2
variants/esp32s3/tbeam-s3-core/variant.h
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@ -62,6 +62,6 @@
// #define PCF8563_RTC 0x51 //Putting definitions in variant. h does not compile correctly // #define PCF8563_RTC 0x51 //Putting definitions in variant. h does not compile correctly
// has 32768 Hz crystal // has 32768 Hz crystal
#define HAS_32768HZ #define HAS_32768HZ 1
#define USE_SH1106 #define USE_SH1106