improve debugging on cortex m

bin/nrf52840-gdbserver.sh

@@ -1,3 +1,3 @@
 
 
-JLinkGDBServerCLExe -if SWD -select USB -port 2331 -device NRF52840_XXAA
+JLinkGDBServerCLExe -if SWD -select USB -port 2331 -device NRF52840_XXAA -SuppressInfoUpdateFW -DisableAutoUpdateFW -rtos GDBServer/RTOSPlugin_FreeRTOS

platformio.ini

@@ -9,13 +9,13 @@
 ; https://docs.platformio.org/page/projectconf.html
 
 [platformio]
-default_envs = tbeam
+;default_envs = tbeam
 ;default_envs = tbeam0.7
 ;default_envs = heltec
 ;default_envs = tlora-v1
 ;default_envs = tlora-v2
 ;default_envs = lora-relay-v1 # nrf board
-;default_envs = eink
+default_envs = eink
 ;default_envs = linux # lora-relay-v1 # nrf52840dk-geeksville # linux # or if you'd like to change the default to something like lora-relay-v1 put that here
 
 [common]
@@ -184,7 +184,6 @@ src_filter =
 ; platform = nordicnrf52
 platform = https://github.com/meshtastic/platform-nordicnrf52.git#1a2639a6b0f79b5df66bea3e3089f0d5285fdc63
 extends = arduino_base
-debug_tool = jlink
 build_type = debug ; I'm debugging with ICE a lot now
 ; note: liboberon provides the AES256 implementation for NRF52 (though not using the hardware acceleration of the NRF52840 - FIXME)
 build_flags = 
@@ -198,6 +197,26 @@ lib_ignore =
   BluetoothOTA
 monitor_port = /dev/ttyACM1
 
+# we pass in options to jlink so it can understand freertos (note: we don't use "jlink" as the tool)
+debug_tool = jlink
+debug_port = :2331
+# Note: the ARGUMENTS MUST BE on multiple lines.  Otherwise platformio/commands/debug/helpers.py misparses everything into the "executable"
+# attribute and leaves "arguments" empty
+# /home/kevinh/.platformio/packages/tool-jlink/JLinkGDBServerCLExe 
+debug_server = 
+  /usr/bin/JLinkGDBServerCLExe
+  -singlerun 
+  -if 
+  SWD 
+  -select 
+  USB 
+  -device 
+  nRF52840_xxAA 
+  -port 
+  2331 
+  -rtos 
+  GDBServer/RTOSPlugin_FreeRTOS
+
 debug_extra_cmds =
   source gdbinit
 

src/nrf52/hardfault.cpp

@@ -82,8 +82,34 @@ extern "C" void HardFault_Impl(uint32_t stack[])
     // while (1) ;
 }
 
+#ifndef INC_FREERTOS_H
+// This is a generic cortex M entrypoint that doesn't assume freertos
+
 extern "C" void HardFault_Handler(void)
 {
     asm volatile(" mrs r0,msp\n"
                  " b HardFault_Impl \n");
 }
+#else
+
+/* The prototype shows it is a naked function - in effect this is just an
+assembly function. */
+extern "C"  void HardFault_Handler( void ) __attribute__( ( naked ) );
+
+/* The fault handler implementation calls a function called
+prvGetRegistersFromStack(). */
+extern "C"  void HardFault_Handler(void)
+{
+    __asm volatile
+    (
+        " tst lr, #4                                                \n"
+        " ite eq                                                    \n"
+        " mrseq r0, msp                                             \n"
+        " mrsne r0, psp                                             \n"
+        " ldr r1, [r0, #24]                                         \n"
+        " ldr r2, handler2_address_const                            \n"
+        " bx r2                                                     \n"
+        " handler2_address_const: .word HardFault_Impl    \n"
+    );
+}
+#endif