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fix comments and cleanup ISR code
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20b41836e2
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@ -153,15 +153,14 @@ void RH_RF95::handleInterrupt()
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// Read the interrupt register
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uint8_t irq_flags = spiRead(RH_RF95_REG_12_IRQ_FLAGS);
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// ack all interrupts, note - we did this already in the RX_DONE case above, and we don't want to do it twice
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// ack all interrupts
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// note from radiohead author wrt old code (with IMO wrong fix)
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// Sigh: on some processors, for some unknown reason, doing this only once does not actually
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// clear the radio's interrupt flag. So we do it twice. Why? (kevinh - I think the root cause we want level
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// triggered interrupts here - not edge. Because edge allows us to miss handling secondard interrupts that occurred
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// while this ISR was running. Better to instead, configure the interrupts as level triggered and clear pending
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// at the _beginning_ of the ISR. If any interrupts occur while handling the ISR, the signal will remain asserted and
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// our ISR will be reinvoked to handle that case)
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// kevinh: turn this off until root cause is known, because it can cause missed interrupts!
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// spiWrite(RH_RF95_REG_12_IRQ_FLAGS, 0xff); // Clear all IRQ flags
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spiWrite(RH_RF95_REG_12_IRQ_FLAGS, 0xff); // Clear all IRQ flags
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// Note: there can be substantial latency between ISR assertion and this function being run, therefore
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@ -169,14 +168,10 @@ void RH_RF95::handleInterrupt()
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// Note: we are running the chip in continuous receive mode (currently, so RX_TIMEOUT shouldn't ever occur)
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bool haveRxError = irq_flags & (RH_RF95_RX_TIMEOUT | RH_RF95_PAYLOAD_CRC_ERROR);
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if (haveRxError)
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// if (_mode == RHModeRx && irq_flags & (RH_RF95_RX_TIMEOUT | RH_RF95_PAYLOAD_CRC_ERROR))
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{
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if (haveRxError) {
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_rxBad++;
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clearRxBuf();
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}
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if ((irq_flags & RH_RF95_RX_DONE) && !haveRxError) {
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} else if (irq_flags & RH_RF95_RX_DONE) {
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// Read the RegHopChannel register to check if CRC presence is signalled
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// in the header. If not it might be a stray (noise) packet.*
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uint8_t crc_present = spiRead(RH_RF95_REG_1C_HOP_CHANNEL) & RH_RF95_RX_PAYLOAD_CRC_IS_ON;
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