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381 lines
19 KiB
C
381 lines
19 KiB
C
/*
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* Copyright (c) Nordic Semiconductor ASA
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form, except as embedded into a Nordic
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* Semiconductor ASA integrated circuit in a product or a software update for
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* such product, must reproduce the above copyright notice, this list of
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* conditions and the following disclaimer in the documentation and/or other
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* materials provided with the distribution.
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*
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* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* 4. This software, with or without modification, must only be used with a
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* Nordic Semiconductor ASA integrated circuit.
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*
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* 5. Any software provided in binary form under this license must not be reverse
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* engineered, decompiled, modified and/or disassembled.
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*
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* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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@defgroup nrf_sdm_api SoftDevice Manager API
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@{
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@brief APIs for SoftDevice management.
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*/
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#ifndef NRF_SDM_H__
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#define NRF_SDM_H__
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#include "nrf.h"
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#include "nrf_error.h"
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#include "nrf_error_sdm.h"
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#include "nrf_soc.h"
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#include "nrf_svc.h"
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @addtogroup NRF_SDM_DEFINES Defines
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* @{ */
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#ifdef NRFSOC_DOXYGEN
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/// Declared in nrf_mbr.h
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#define MBR_SIZE 0
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#warning test
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#endif
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/** @brief The major version for the SoftDevice binary distributed with this header file. */
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#define SD_MAJOR_VERSION (7)
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/** @brief The minor version for the SoftDevice binary distributed with this header file. */
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#define SD_MINOR_VERSION (3)
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/** @brief The bugfix version for the SoftDevice binary distributed with this header file. */
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#define SD_BUGFIX_VERSION (0)
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/** @brief The SoftDevice variant of this firmware. */
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#define SD_VARIANT_ID 140
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/** @brief The full version number for the SoftDevice binary this header file was distributed
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* with, as a decimal number in the form Mmmmbbb, where:
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* - M is major version (one or more digits)
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* - mmm is minor version (three digits)
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* - bbb is bugfix version (three digits). */
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#define SD_VERSION (SD_MAJOR_VERSION * 1000000 + SD_MINOR_VERSION * 1000 + SD_BUGFIX_VERSION)
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/** @brief SoftDevice Manager SVC Base number. */
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#define SDM_SVC_BASE 0x10
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/** @brief SoftDevice unique string size in bytes. */
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#define SD_UNIQUE_STR_SIZE 20
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/** @brief Invalid info field. Returned when an info field does not exist. */
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#define SDM_INFO_FIELD_INVALID (0)
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/** @brief Defines the SoftDevice Information Structure location (address) as an offset from
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the start of the SoftDevice (without MBR)*/
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#define SOFTDEVICE_INFO_STRUCT_OFFSET (0x2000)
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/** @brief Defines the absolute SoftDevice Information Structure location (address) when the
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* SoftDevice is installed just above the MBR (the usual case). */
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#define SOFTDEVICE_INFO_STRUCT_ADDRESS (SOFTDEVICE_INFO_STRUCT_OFFSET + MBR_SIZE)
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/** @brief Defines the offset for the SoftDevice Information Structure size value relative to the
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* SoftDevice base address. The size value is of type uint8_t. */
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#define SD_INFO_STRUCT_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET)
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/** @brief Defines the offset for the SoftDevice size value relative to the SoftDevice base address.
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* The size value is of type uint32_t. */
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#define SD_SIZE_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x08)
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/** @brief Defines the offset for FWID value relative to the SoftDevice base address. The FWID value
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* is of type uint16_t. */
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#define SD_FWID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x0C)
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/** @brief Defines the offset for the SoftDevice ID relative to the SoftDevice base address. The ID
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* is of type uint32_t. */
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#define SD_ID_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x10)
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/** @brief Defines the offset for the SoftDevice version relative to the SoftDevice base address in
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* the same format as @ref SD_VERSION, stored as an uint32_t. */
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#define SD_VERSION_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x14)
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/** @brief Defines the offset for the SoftDevice unique string relative to the SoftDevice base address.
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* The SD_UNIQUE_STR is stored as an array of uint8_t. The size of array is @ref SD_UNIQUE_STR_SIZE.
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*/
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#define SD_UNIQUE_STR_OFFSET (SOFTDEVICE_INFO_STRUCT_OFFSET + 0x18)
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/** @brief Defines a macro for retrieving the actual SoftDevice Information Structure size value
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* from a given base address. Use @ref MBR_SIZE as the argument when the SoftDevice is
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* installed just above the MBR (the usual case). */
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#define SD_INFO_STRUCT_SIZE_GET(baseaddr) (*((uint8_t *)((baseaddr) + SD_INFO_STRUCT_SIZE_OFFSET)))
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/** @brief Defines a macro for retrieving the actual SoftDevice size value from a given base
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* address. Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above
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* the MBR (the usual case). */
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#define SD_SIZE_GET(baseaddr) (*((uint32_t *)((baseaddr) + SD_SIZE_OFFSET)))
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/** @brief Defines the amount of flash that is used by the SoftDevice.
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* Add @ref MBR_SIZE to find the first available flash address when the SoftDevice is installed
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* just above the MBR (the usual case).
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*/
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#define SD_FLASH_SIZE 0x26000
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/** @brief Defines a macro for retrieving the actual FWID value from a given base address. Use
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* @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the usual
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* case). */
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#define SD_FWID_GET(baseaddr) (*((uint16_t *)((baseaddr) + SD_FWID_OFFSET)))
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/** @brief Defines a macro for retrieving the actual SoftDevice ID from a given base address. Use
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* @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR (the
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* usual case). */
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#define SD_ID_GET(baseaddr) \
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((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_ID_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \
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? (*((uint32_t *)((baseaddr) + SD_ID_OFFSET))) \
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: SDM_INFO_FIELD_INVALID)
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/** @brief Defines a macro for retrieving the actual SoftDevice version from a given base address.
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* Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR
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* (the usual case). */
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#define SD_VERSION_GET(baseaddr) \
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((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_VERSION_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \
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? (*((uint32_t *)((baseaddr) + SD_VERSION_OFFSET))) \
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: SDM_INFO_FIELD_INVALID)
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/** @brief Defines a macro for retrieving the address of SoftDevice unique str based on a given base address.
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* Use @ref MBR_SIZE as the argument when the SoftDevice is installed just above the MBR
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* (the usual case). */
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#define SD_UNIQUE_STR_ADDR_GET(baseaddr) \
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((SD_INFO_STRUCT_SIZE_GET(baseaddr) > (SD_UNIQUE_STR_OFFSET - SOFTDEVICE_INFO_STRUCT_OFFSET)) \
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? (((uint8_t *)((baseaddr) + SD_UNIQUE_STR_OFFSET))) \
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: SDM_INFO_FIELD_INVALID)
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/**@defgroup NRF_FAULT_ID_RANGES Fault ID ranges
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* @{ */
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#define NRF_FAULT_ID_SD_RANGE_START 0x00000000 /**< SoftDevice ID range start. */
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#define NRF_FAULT_ID_APP_RANGE_START 0x00001000 /**< Application ID range start. */
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/**@} */
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/**@defgroup NRF_FAULT_IDS Fault ID types
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* @{ */
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#define NRF_FAULT_ID_SD_ASSERT \
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(NRF_FAULT_ID_SD_RANGE_START + 1) /**< SoftDevice assertion. The info parameter is reserved for future used. */
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#define NRF_FAULT_ID_APP_MEMACC \
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(NRF_FAULT_ID_APP_RANGE_START + 1) /**< Application invalid memory access. The info parameter will contain 0x00000000, \
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in case of SoftDevice RAM access violation. In case of SoftDevice peripheral \
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register violation the info parameter will contain the sub-region number of \
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PREGION[0], on whose address range the disallowed write access caused the \
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memory access fault. */
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/**@} */
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/** @} */
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/** @addtogroup NRF_SDM_ENUMS Enumerations
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* @{ */
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/**@brief nRF SoftDevice Manager API SVC numbers. */
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enum NRF_SD_SVCS {
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SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */
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SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */
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SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */
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SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */
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SVC_SDM_LAST /**< Placeholder for last SDM SVC */
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};
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/** @} */
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/** @addtogroup NRF_SDM_DEFINES Defines
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* @{ */
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/**@defgroup NRF_CLOCK_LF_ACCURACY Clock accuracy
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* @{ */
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#define NRF_CLOCK_LF_ACCURACY_250_PPM (0) /**< Default: 250 ppm */
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#define NRF_CLOCK_LF_ACCURACY_500_PPM (1) /**< 500 ppm */
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#define NRF_CLOCK_LF_ACCURACY_150_PPM (2) /**< 150 ppm */
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#define NRF_CLOCK_LF_ACCURACY_100_PPM (3) /**< 100 ppm */
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#define NRF_CLOCK_LF_ACCURACY_75_PPM (4) /**< 75 ppm */
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#define NRF_CLOCK_LF_ACCURACY_50_PPM (5) /**< 50 ppm */
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#define NRF_CLOCK_LF_ACCURACY_30_PPM (6) /**< 30 ppm */
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#define NRF_CLOCK_LF_ACCURACY_20_PPM (7) /**< 20 ppm */
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#define NRF_CLOCK_LF_ACCURACY_10_PPM (8) /**< 10 ppm */
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#define NRF_CLOCK_LF_ACCURACY_5_PPM (9) /**< 5 ppm */
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#define NRF_CLOCK_LF_ACCURACY_2_PPM (10) /**< 2 ppm */
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#define NRF_CLOCK_LF_ACCURACY_1_PPM (11) /**< 1 ppm */
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/** @} */
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/**@defgroup NRF_CLOCK_LF_SRC Possible LFCLK oscillator sources
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* @{ */
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#define NRF_CLOCK_LF_SRC_RC (0) /**< LFCLK RC oscillator. */
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#define NRF_CLOCK_LF_SRC_XTAL (1) /**< LFCLK crystal oscillator. */
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#define NRF_CLOCK_LF_SRC_SYNTH (2) /**< LFCLK Synthesized from HFCLK. */
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/** @} */
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/** @} */
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/** @addtogroup NRF_SDM_TYPES Types
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* @{ */
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/**@brief Type representing LFCLK oscillator source. */
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typedef struct {
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uint8_t source; /**< LF oscillator clock source, see @ref NRF_CLOCK_LF_SRC. */
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uint8_t rc_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: Calibration timer interval in 1/4 second
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units (nRF52: 1-32).
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@note To avoid excessive clock drift, 0.5 degrees Celsius is the
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maximum temperature change allowed in one calibration timer
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interval. The interval should be selected to ensure this.
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@note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC. */
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uint8_t rc_temp_ctiv; /**< Only for ::NRF_CLOCK_LF_SRC_RC: How often (in number of calibration
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intervals) the RC oscillator shall be calibrated if the temperature
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hasn't changed.
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0: Always calibrate even if the temperature hasn't changed.
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1: Only calibrate if the temperature has changed (legacy - nRF51 only).
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2-33: Check the temperature and only calibrate if it has changed,
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however calibration will take place every rc_temp_ctiv
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intervals in any case.
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@note Must be 0 if source is not ::NRF_CLOCK_LF_SRC_RC.
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@note For nRF52, the application must ensure calibration at least once
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every 8 seconds to ensure +/-500 ppm clock stability. The
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recommended configuration for ::NRF_CLOCK_LF_SRC_RC on nRF52 is
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rc_ctiv=16 and rc_temp_ctiv=2. This will ensure calibration at
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least once every 8 seconds and for temperature changes of 0.5
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degrees Celsius every 4 seconds. See the Product Specification
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for the nRF52 device being used for more information.*/
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uint8_t accuracy; /**< External clock accuracy used in the LL to compute timing
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windows, see @ref NRF_CLOCK_LF_ACCURACY.*/
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} nrf_clock_lf_cfg_t;
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/**@brief Fault Handler type.
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*
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* When certain unrecoverable errors occur within the application or SoftDevice the fault handler will be called back.
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* The protocol stack will be in an undefined state when this happens and the only way to recover will be to
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* perform a reset, using e.g. CMSIS NVIC_SystemReset().
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* If the application returns from the fault handler the SoftDevice will call NVIC_SystemReset().
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*
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* @note It is recommended to either perform a reset in the fault handler or to let the SoftDevice reset the device.
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* Otherwise SoC peripherals may behave in an undefined way. For example, the RADIO peripherial may
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* continously transmit packets.
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*
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* @note This callback is executed in HardFault context, thus SVC functions cannot be called from the fault callback.
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*
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* @param[in] id Fault identifier. See @ref NRF_FAULT_IDS.
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* @param[in] pc The program counter of the instruction that triggered the fault.
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* @param[in] info Optional additional information regarding the fault. Refer to each Fault identifier for details.
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*
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* @note When id is set to @ref NRF_FAULT_ID_APP_MEMACC, pc will contain the address of the instruction being executed at the time
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* when the fault is detected by the CPU. The CPU program counter may have advanced up to 2 instructions (no branching) after the
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* one that triggered the fault.
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*/
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typedef void (*nrf_fault_handler_t)(uint32_t id, uint32_t pc, uint32_t info);
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/** @} */
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/** @addtogroup NRF_SDM_FUNCTIONS Functions
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* @{ */
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/**@brief Enables the SoftDevice and by extension the protocol stack.
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*
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* @note Some care must be taken if a low frequency clock source is already running when calling this function:
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* If the LF clock has a different source then the one currently running, it will be stopped. Then, the new
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* clock source will be started.
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*
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* @note This function has no effect when returning with an error.
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*
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* @post If return code is ::NRF_SUCCESS
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* - SoC library and protocol stack APIs are made available.
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* - A portion of RAM will be unavailable (see relevant SDS documentation).
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* - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation).
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* - Interrupts will not arrive from protected peripherals or interrupts.
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* - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the SoftDevice.
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* - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation).
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* - Chosen low frequency clock source will be running.
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*
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* @param p_clock_lf_cfg Low frequency clock source and accuracy.
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If NULL the clock will be configured as an RC source with rc_ctiv = 16 and .rc_temp_ctiv = 2
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In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to
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the actual characteristics of your XTAL clock.
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* @param fault_handler Callback to be invoked in case of fault, cannot be NULL.
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*
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* @retval ::NRF_SUCCESS
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* @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied.
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* @retval ::NRF_ERROR_INVALID_STATE SoftDevice is already enabled, and the clock source and fault handler cannot be updated.
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* @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDevice interrupt is already enabled, or an enabled interrupt has
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an illegal priority level.
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* @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected.
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* @retval ::NRF_ERROR_INVALID_PARAM Invalid clock source configuration supplied in p_clock_lf_cfg.
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*/
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SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t,
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sd_softdevice_enable(nrf_clock_lf_cfg_t const *p_clock_lf_cfg, nrf_fault_handler_t fault_handler));
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/**@brief Disables the SoftDevice and by extension the protocol stack.
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*
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* Idempotent function to disable the SoftDevice.
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*
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* @post SoC library and protocol stack APIs are made unavailable.
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* @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest).
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* @post All peripherals used by the SoftDevice will be reset to default values.
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* @post All of RAM become available.
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* @post All interrupts are forwarded to the application.
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* @post LFCLK source chosen in ::sd_softdevice_enable will be left running.
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*
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* @retval ::NRF_SUCCESS
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*/
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SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void));
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/**@brief Check if the SoftDevice is enabled.
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*
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* @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0.
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*
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* @retval ::NRF_SUCCESS
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*/
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SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t *p_softdevice_enabled));
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/**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice
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*
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* This function is only intended to be called when a bootloader is enabled.
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*
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* @param[in] address The base address of the interrupt vector table for forwarded interrupts.
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* @retval ::NRF_SUCCESS
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*/
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SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address));
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif // NRF_SDM_H__
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/**
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@}
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*/
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